Laser Diode Submounts (Au/Sn)

Applied Thin-Film Products (ATP) is one of the industry leaders for Laser Diode Submounts with pre-deposited Au/Sn. ATP custom fabricates thin-film submounts with tightly controlled substrate and metal thicknesses for your alignment needs. Hi-thermal conductivity materials include Aluminum Nitride (AlN) and Beryllium Oxide (BeO).

These submounts can have pre-deposited and patterned Gold Tin (Au/Sn) to accommodate lower manufacturing cost, higher volume, and automated assembly of laser diode modules. The use of pre-deposited and patterned Au/Sn replaces the more traditional approach of using thick Au/Sn preforms. ATP’s standard alloy composition is 80% Au and 20% Sn which typically reflows at 278°C under a high purity gas blanket consisting either of forming gas or Nitrogen.

Other Au/Sn custom compositions are available. ATP offers a sputtered and plated Au/Sn eutectic. Samples are available. Please ask for ATP1014S for sputtered and ATP1014P for plated.

In order to strengthen the relationship with our customers, ATP performs Au/Sn reflow tests as a standard practice on each lot to ensure the performance of the Au/Sn meets our customers’ expectation. We offer three standard test profiles for our customers to choose from that would closely resemble their assembly processes:

Test Profile Profile Detail Placement of test die on Au/Sn Pattern Scrub On/Off
1

Circuit with Au/Sn pattern is
placed on work holder which is
at 290–305°C for 5 seconds

After the circuit with Au/Sn pattern is placed on work holder On
2

260°C ± 5°C soak for 1 min

Ramp to 290–305°C and stay
for 5 seconds

As the beginning of the soak and the test die is held down until completion of the profile Off
3

200°C ± 5°C soak for 2 seconds

Ramp to 290–305°C and stay
for 5 seconds

After ramp temparature is reached On

Note: Test Profile 1 is applicable to both plated and sputtered Au/Sn patterns. Test Profiles 2 and 3 are only applicable to plated Au/Sn patterns.

Custom test profile and the detailed test procedure are available upon request. Die Shear test will be performed on the test die to meet and/or exceed MIL-STD-883.

Replaces Traditional Au/Sn Preforms

Accurately Controlled Thickness

Lot to Lot Consistency

Reduce Au/Sn Thickness

Homogeneous 80% Au/20% Sn

Complex Solder Pad Geometries

Accurate Laser Alignment

Pre-Deposited and Patterned Au/Sn Guidelines

Smallest Feature Size: 0.003" x 0.003" (0.076mm x 0.076 mm)

Minimum Pitch (minimum space between Au/Sn Pads): 0.003" (0.076mm)

Typical Au/Sn Thickness: 160–240µ" (4–6 microns) (Thickness outside of the typical range might restrict the process used.)

Minimum Sputtered Au/Sn Thickness: 80µ" (2 microns)

Tolerance on Thickness of Plated Au/Sn: ±80µ" (±2 microns)

Placement Accuracy of Au/Sn: ±0.0005" (±0.0127mm)

Dimensional Tolerance on Au/Sn Pad: ±0.0002" (±0.005mm)

Minimum Pull Back From Laser Cut Edge: 0.0015" (0.0381mm)

Minimum Pull Back From Conductive Plated Thru Via Holes: 0.0025" (0.0635mm)

 

ATP circuits with Au/Sn are best assembled when received. Little information is available about long-term storage of thin Au/Sn layers under ambient conditions. Gold Tin intermetallic compounds (IMCs) are known to form at room temperature when excess Au or Sn is present, so compositional changes might occur during long-term storage. To our knowledge, oxidation of Au/Sn IMCs has not been studied but likely is accelerated by high humidity and high storage temperature.

  Laser Diode Submount

Laser Diode Submount

ATP1014P: Plated before reflow

ATP1014P: Plated before reflow

 
ATP1014P: Plated after reflow

ATP1014P: Plated after reflow

ATP1014S: Sputtered before reflow

ATP1014S: Sputtered before reflow

ATP1014S: Sputtered after reflow

ATP1014S: Sputtered after reflow

Company Technologies Capabilities Design Guidelines Products Other

Introduction

Polyimide Supported Bridges

Photomasks

Standard Dimensions and Tolerances

Inductor Coils

Home

Quality Assurance System

Solder Dams

Substrates

Material and Conversion Tables

Inductor Coils Eng. Kit

Contact Us

Directions

Laser Diode Submounts (Au/Sn)

Material Specs

Thermal Performance

Microstrip Transmission Lines

Terms of Use

Employment

Vias: Plated Through

Laser Machining/Drilling-Vias

Aging Equation

Transmission Lines Eng. Kits

Privacy Policy

Sales Rep’s

Vias: Au or Cu Solid Filled

Backside Burnishing Treatment

Safe Current Limits

Stand Off/Isolation Pads

Facebook

Contact Us

Edge Wraps

Metallizations

Design Resources

ATP Bond Qualification Coupons

 
 

Gold Bumping

Integrated TaN Resistors

 

Product Samples

 
 

Fractal Fasten

Laser Resistor Trimming

 

Packaging/Chip Trays

 
   

Serialization